Passing gate stuck-open fault testing in MOS combinational circuits

A testable design for a passing gate when it is not used in a multiplexer type structure and subject to a stuck-open fault condition is presented. It is shown that the new approach can be extended to passing gate-based multiplexers for which a better testing scheme is ensured. The authors also demonstrate that not all passing gates need to be augmented using an additional MOS transistor, so that the circuit under study can be kept combinational while in the test mode. Finally, the test generation for isolated passing gates in the context of the PODEM algorithm is discussed