DocumentCode
2798187
Title
Encoding Algorithms for Logic Synthesis
Author
Sklyarov, Valery ; Skliarova, Iouliia
Author_Institution
Univ. of Aveiro, Aveiro
fYear
2007
fDate
13-16 May 2007
Firstpage
359
Lastpage
366
Abstract
This paper presents an encoding algorithm that is very efficient for many different logic synthesis problems. The algorithm is based on the use of special tables and includes two basic steps: searching for predefined graphical shapes in the tables, and swapping coded variables in the tables taking into account some constraints. The latter are specified with the aid of an auxiliary graph that reflects the overlap between coded variables in different subsets that have to be accommodated in the tables. The examples in the paper and the results of experiments have shown that the use of the proposed algorithm for state encoding allows the number of logic elements for combinational circuits of finite state machines to be decreased.
Keywords
combinational circuits; encoding; finite state machines; auxiliary graph; combinational circuits; finite state machines; graphical shapes; logic elements; logic synthesis problems; state encoding algorithm; swapping coded variables; Automata; Boolean functions; Circuit synthesis; Combinational circuits; Digital circuits; Encoding; Informatics; Input variables; Logic; Shape;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Systems and Applications, 2007. AICCSA '07. IEEE/ACS International Conference on
Conference_Location
Amman
Print_ISBN
1-4244-1030-4
Electronic_ISBN
1-4244-1031-2
Type
conf
DOI
10.1109/AICCSA.2007.370906
Filename
4230981
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