High gain, high efficiency, low voltage, medium power Si-bipolar transistor suitable for integration

Author

van Rijs, F. ; Dekker, R. ; Magnee, P.H.C. ; Vanoppen, R. ; v.d.Heijden, E. ; Balm, B.N. ; Colussi, L.C.

Author_Institution

Philips Res. Lab., Eindhoven, Netherlands

fYear

1997

fDate

10-10 June 1997

Firstpage

15

Lastpage

18

Abstract

Medium power transistors in a high performance double polysilicon bipolar process have been fabricated. On-wafer loadpull measurements show high gain (15 dB) and high maximum efficiency (60%) at 1.8 GHz with 27 dBm of output power. These results were obtained with a low supply voltage of 3.5 V. More importantly, these results were obtained with transistors with a buried layer having a collector contact at the top, which makes it possible to integrate power amplifiers on chip.

Keywords

UHF bipolar transistors; UHF integrated circuits; UHF measurement; UHF power amplifiers; characteristics measurement; elemental semiconductors; power bipolar transistors; silicon; 1.8 GHz; 15 dB; 3.5 V; 60 percent; Si; bipolar transistor; buried layer; collector contact; double polysilicon bipolar process; medium power transistors; on-wafer loadpull measurements; output power; supply voltage; Bipolar transistors; Bonding; Gain; Isolation technology; Laboratories; Low voltage; Power generation; Power transistors; Silicon; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 1997., IEEE

Conference_Location

Denver, CO, USA

Print_ISBN

0-7803-4063-9

Type

conf

DOI

10.1109/RFIC.1997.598732

Filename

598732