A scalable multiple-SIMD architecture for real-time image understanding

The Warwick Pyramid Machine (WPM) is an M-SIMD (multiple-single instruction multiple data) heterogeneous pyramid architecture for real-time image understanding. SIMD (single instruction multiple data) machines are appropriate for the early stages of image processing. Subsequent numeric and symbolic processing makes poor use of an SIMD array, and is more suited to one or more conventional processors. Multiple-SIMD architectures divide an SIMD array into smaller sub-arrays, or clusters. Clusters may operate in synchrony, or autonomously. In the Warwick M-SIMD architecture each cluster consists of a small SIMD array, a controller, and a conventional microprocessor. The controller and the SIMD array may be considered as a single processor with a conventional ALU (arithmetic logic unit) and register structure, but with the addition of an array ALU with array registers. The conventional microprocessors form an MIMD (multiple instruction multiple data) array. Clusters may be configured to meet the real-time, or other, constraints of an application