DocumentCode
2799554
Title
Identification of Defective TSVs in Pre-Bond Testing of 3D ICs
Author
Noia, Brandon ; Chakrabarty, Krishnendu
Author_Institution
Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
fYear
2011
fDate
20-23 Nov. 2011
Firstpage
187
Lastpage
194
Abstract
Pre-bond testing of TSVs has been identified as a major challenge for yield assurance in 3D ICs. We present a defective-TSV localization technique based on pre-bond probing of a network of TSVs. We describe an efficient algorithm for designing parallel TSV test sessions such that test time is reduced and a given number of faulty TSVs within the TSV network can be uniquely identified. Optimization results for various networks of TSVs highlight significant reduction in test time using the proposed method.
Keywords
circuit optimisation; integrated circuit testing; integrated circuit yield; three-dimensional integrated circuits; 3D IC; defective TSV identification; defective TSV localization; faulty TSV; optimization; parallel TSV test sessions; pre-bond probing; pre-bond testing; yield assurance; Capacitance; Capacitors; Needles; Probes; Testing; Three dimensional displays; Through-silicon vias; Dft; Pre-bond; Probing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (ATS), 2011 20th Asian
Conference_Location
New Delhi
ISSN
1081-7735
Print_ISBN
978-1-4577-1984-4
Type
conf
DOI
10.1109/ATS.2011.57
Filename
6114534
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