DocumentCode
2800256
Title
Hybrid CMOS/nanoelectronic digital circuits: devices, architectures, and design automation
Author
DeHon, André ; Likharev, Konstantin K.
Author_Institution
Dept. of Comput. Sci., California Inst. of Technol., Pasadena, CA, USA
fYear
2005
fDate
6-10 Nov. 2005
Firstpage
375
Lastpage
382
Abstract
Physics offers several active devices with nanometer-scale footprint, that can be best used in combination with a CMOS subsystem. Such hybrid circuits offer the potential for high defect tolerance combined with unparalleled performance. In this tutorial, we highlight key issues and architectural alternatives for this promising technology and outline the challenges posed by the hybrid circuits pose for design automation.
Keywords
CMOS digital integrated circuits; hybrid integrated circuits; integrated circuit design; logic design; nanoelectronics; CMOS digital circuits; CMOS subsystem; defect tolerance; design automation; hybrid circuits; nanoelectronic digital circuits; nanometer-scale footprint; CMOS digital integrated circuits; CMOS technology; Design automation; Digital circuits; Fabrication; MOSFETs; Nanoscale devices; Nanowires; Self-assembly; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 2005. ICCAD-2005. IEEE/ACM International Conference on
Print_ISBN
0-7803-9254-X
Type
conf
DOI
10.1109/ICCAD.2005.1560097
Filename
1560097
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