Title :
What GaAs chips should cost
Author_Institution :
Integrated Circuit Eng. Corp., Scottsdale, AZ, USA
Abstract :
An analysis is made of the manufacturing costs of GaAs products, paying particular attention to the construction of a GaAs waver fabrication cost model. The fabrication cost for a 14-mask, three-layer metal, GaAs process was calculated and, for reference, compared to the cost of an 18-mask, two-layer metal, BiCMOS process. The analyses begin with fixed asset costs and add direct and indirect manufacturing costs. Assuming reasonable facility utilization (wafer volume), the input wafer fabrication costs for the two processes are reasonably comparable. Through the use of a silicon defect-density model (Murphy), die costs for four GaAs dice and one silicon die were obtained. Calculations of assembly and final test costs and final test yields resulted in product costs. Charts depicting these results are presented. At a $188.00 price, an 80000 sq. mil digital ASIC GaAs device would currently contribute a gross margin of 50 percent.<>
Keywords :
III-V semiconductors; application specific integrated circuits; digital integrated circuits; economics; integrated circuit manufacture; monolithic integrated circuits; GaAs; III-V semiconductors; assembly; defect-density model; die costs; digital ASIC; facility utilization; final test costs; final test yields; fixed asset costs; input wafer fabrication costs; manufacturing costs; three-layer metal; waver fabrication cost model; Application specific integrated circuits; Digital integrated circuits; Economics; Integrated circuit manufacture; Monolithic integrated circuits;
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1991. Technical Digest 1991., 13th Annual
Conference_Location :
Monterey, CA, USA
Print_ISBN :
0-7803-0196-X
DOI :
10.1109/GAAS.1991.172690