Title :
A high speed VLSI algorithm for A*B modulo N
Author :
Gala, Murali M R ; Leung, Yu-Ying J.
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
Abstract :
A VLSI algorithm was developed for the computation of the remainder of A*B mod N based on radix-4 arithmetic. The speed of the computation is enhanced by using radix-4 multiplication and radix-4 SRT division. The hardware design which is suitable for VLSI implementation is presented
Keywords :
VLSI; digital arithmetic; integrated logic circuits; A*B modulo N; hardware design; high speed VLSI algorithm; multiplication; radix-4 SRT division; radix-4 arithmetic; remainder computation; Arithmetic; Communication channels; Data privacy; Delay; Hardware; Instruments; Postal services; Public key cryptography; Telephony; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
Conference_Location :
Calgary, Alta.
Print_ISBN :
0-7803-0081-5
DOI :
10.1109/MWSCAS.1990.140735
