• DocumentCode
    280130
  • Title

    A 21/2-dimensional VLSI systolic array

  • Author

    Lam, S.P.S.

  • Author_Institution
    Sch. of Inf. Syst., East Anglia Univ., Norwich, UK
  • fYear
    1990
  • fDate
    33024
  • Firstpage
    42461
  • Lastpage
    42465
  • Abstract
    A novel systolic array architecture, called the `21/ 2-dimensional systolic array´ (21/2-d SA), which has a pseudo-3-dimensional configuration among an array of processing cells, will be presented to overcome some of the shortcomings mentioned
  • Keywords
    VLSI; cellular arrays; digital signal processing chips; parallel architectures; 2 1/2 dimensional systolic array; VLSI; processing cells; pseudo-3-dimensional configuration; systolic array architecture;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    VLSI Signal Processing Architectures, IEE Colloquium on
  • Conference_Location
    London
  • Type

    conf

  • Filename
    190292
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=280130