DocumentCode :
2801659
Title :
Efficient LTL compilation for SAT-based model checking
Author :
Armoni, Roy ; Egorov, Sergey ; Fraer, Ranan ; Korchemny, Dmitry ; Vardi, Moshe Y.
Author_Institution :
Intel Corp., Moscow, Russia
fYear :
2005
fDate :
6-10 Nov. 2005
Firstpage :
877
Lastpage :
884
Abstract :
This work describes an algorithm of automata construction for LTL safety properties, suitable for bounded model checking. Existing automata construction methods are tailored to BDD-based symbolic model checking. The novelty of our approach is that we construct deterministic automata, unlike the standard approach, which constructs nondeterministic automata. We show that the proposed method has significant advantages for bounded model checking over traditional methods.
Keywords :
formal logic; logic testing; BDD-based symbolic model checking; LTL compilation; LTL safety property; SAT-based model checking; automata construction; bounded model checking; deterministic automata; linear temporal logics; nondeterministic automata; Automata; Automatic test pattern generation; Automatic testing; Boolean functions; Data structures; Libraries; Logic; Safety; State-space methods; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 2005. ICCAD-2005. IEEE/ACM International Conference on
Print_ISBN :
0-7803-9254-X
Type :
conf
DOI :
10.1109/ICCAD.2005.1560185
Filename :
1560185
Link To Document :
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