Silicon-germanium structure in surrounding-gate strained silicon nanowire FETs

Strained silicon devices have been widely studied (Lee et al., 2002; Fenouillet-Beranger et al., 2004). They possess better driving capacity than that of silicon-based devices. Double-gate strained silicon field effect transistors (FET) have recently been proposed and found better transport characteristics than single gate strained devices. For example, double-gate strained silicon FETs not only have relatively high mobility, high transconductance, and ideal subthreshold swing but also suppress short-channel effects (SCEs) (Lee et al., 2002; Fenouillet-Beranger et al., 2004). Due to superior channel controllability, excellent performance of surrounding-gate FET has also been studied to further reduce SCEs (Yang et al., 2002; Venugopal et al., 2002); however, these structures have not been well investigated for strained silicon devices. We have investigated the thickness effect of silicon-germanium for surrounding-gate strained silicon nanowire FETs by our developed 3D nanodevice simulator. R/sub SiGe/ influences the driving current characteristic of surrounding-gate strained silicon nanowire FETs. A large R/sub SiGe/ increases the driving current and does almost not change the transfer characteristics. Strained silicon surrounding-gate nanowire FETs are numerically explored and optimized with respect to various physical parameters.