• DocumentCode
    2803053
  • Title

    Power Aware Embedded Test

  • Author

    Lin, Xijiang ; Moghaddam, Elham ; Mukherjee, Nilanjan ; Nadeau-Dostie, Benoit ; Rajski, Janusz ; Tyszer, Jerzy

  • Author_Institution
    Mentor Graphics Corp., Wilsonville, OR, USA
  • fYear
    2011
  • fDate
    20-23 Nov. 2011
  • Firstpage
    511
  • Lastpage
    516
  • Abstract
    In this paper we examine several embedded low power test schemes that we have proposed over the last few years. These solutions are aimed at reducing the switching activity during all scan-based test operations, particularly including those developed for BIST or deployed to perform on-chip test data compression.
  • Keywords
    built-in self test; embedded systems; integrated circuit testing; low-power electronics; power integrated circuits; BIST; low power test scheme; on-chip test data compression; power aware embedded test; scan-based test operation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium (ATS), 2011 20th Asian
  • Conference_Location
    New Delhi
  • ISSN
    1081-7735
  • Print_ISBN
    978-1-4577-1984-4
  • Type

    conf

  • DOI
    10.1109/ATS.2011.49
  • Filename
    6114727