DocumentCode
2804192
Title
Parallel evidence combination on a SB-tree architecture
Author
Ip, Horace H S ; Tang, Hongying
Author_Institution
Dept. of Comput. Sci., City Polytech. of Hong Kong, Kowloon, Hong Kong
fYear
1996
fDate
18-20 Nov 1996
Firstpage
31
Lastpage
34
Abstract
The paper presents a specialised parallel architecture and algorithms for the computation of Dempster´s rule in evidential reasoning based on the Dempster-Shafer theory. The architecture is scalable and the complexity of the associated parallel algorithms is linear with respect to the number of processors. The approach supports efficient dynamic load balancing which is essential for incremental reasoning. The technique has been simulated on a UNIX based machine and can easily be implemented on a multiprocessor symmetric machine
Keywords
Unix; case-based reasoning; computational complexity; multiprocessing systems; parallel algorithms; pipeline processing; reconfigurable architectures; resource allocation; systolic arrays; trees (mathematics); virtual machines; Dempster´s rule computation; Dempster-Shafer theory; SB-tree architecture; UNIX based machine; complexity; efficient dynamic load balancing; evidential reasoning; incremental reasoning; multiprocessor symmetric machine; parallel algorithms; scalable architecture; simulation; specialised parallel architecture; Algorithm design and analysis; Australia; Computational modeling; Computer architecture; Computer science; Concurrent computing; Load management; Parallel algorithms; Parallel architectures; Parallel processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Information Systems, 1996., Australian and New Zealand Conference on
Conference_Location
Adelaide, SA
Print_ISBN
0-7803-3667-4
Type
conf
DOI
10.1109/ANZIIS.1996.573882
Filename
573882
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