Title :
Threshold voltage shift and drain current degradation by NBT stress in Si (110) pMOSFETs
Author :
Ota, Kensuke ; Saitoh, Masumi ; Nakabayashi, Yukio ; Ishihara, Takamitsu ; Numata, Toshinori ; Uchida, Ken
Author_Institution :
Adv. LSI Technol. Lab., Toshiba Corp., Yokohama, Japan
Abstract :
Threshold voltage shift and drain current degradation by NBT stress in Si (100) and (110) pMOSFETs are systematically studied. Threshold voltage shift in (110) pFET is larger than that in (100) pFET. However, time and temperature dependence of NBTI suggest that the mechanisms of the NBTI degradation are independent of the surface orientations. It is newly found that the drain current degradation in (110) pFET is severer than that in (100) pFET even when the same amount of charges at the interface is generated. This can be explained by larger mobility degradation in (110) pFETs due to the generated interface traps.
Keywords :
MOSFET; interface states; silicon; thermal stability; NBT stress; NBTI degradation; Si; drain current degradation; interface trap; mobility degradation; pMOSFET; surface orientation; threshold voltage shift; Current measurement; Degradation; Logic gates; MOSFETs; Silicon; Stress; Temperature dependence;
Conference_Titel :
Solid-State Device Research Conference (ESSDERC), 2010 Proceedings of the European
Conference_Location :
Sevilla
Print_ISBN :
978-1-4244-6658-0
DOI :
10.1109/ESSDERC.2010.5618447
