DocumentCode :
2806347
Title :
Module placement for power supply noise and wire congestion avoidance in 3D packaging
Author :
Minz, Jacob ; Lim, Sung Kyu ; Choi, Jinwoo ; Swaminathan, Madhavan
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2004
fDate :
25-27 Oct. 2004
Firstpage :
123
Lastpage :
126
Abstract :
In this work, we present an automatic module placement algorithm for simultaneous power supply noise and routing congestion minimization for 3D packaging that are seriously threatening the performance and reliability of 3D packaging. We employ decoupling capacitance insertion for noise suppression and 3D global routing for congestion avoidance.
Keywords :
capacitance; circuit optimisation; electronics packaging; interference suppression; modules; reliability; 3D global routing; 3D packaging; automatic module placement algorithm; decoupling capacitance insertion; power supply noise suppression; reliability; routing congestion minimization; wire congestion avoidance; Active noise reduction; Capacitance; Circuit noise; Current distribution; Impedance; Packaging; Power supplies; Routing; Voltage; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 2004. IEEE 13th Topical Meeting on
Print_ISBN :
0-7803-8667-1
Type :
conf
DOI :
10.1109/EPEP.2004.1407563
Filename :
1407563
Link To Document :
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