Multi-level transmission line circuits for MMICs

Even since their conception in the 1970s, GaAs MMICs have used conventional microstripline techniques. The semi-insulating GaAs substrate is used to confine the field around the conductors, with the back face metalised and grounded. The microstriplines´ widths scale directly with the chip thickness, so that 100 μm and 200 μm is usually used to allow a reasonable range of line impedances and widths. With such wide conductors, however, the gaps between lines must be enormous to prevent coupling problems. In addition, for operation above around 12 GHz, devices and components can only be effectively grounded with through-GaAs via-hole technology. This technology is expensive, and limits the maximum wafer size that can be handled safely, because of the extra fragility. This limit on wafer diameter is the biggest problem for keeping chip costs down. In addition, at millimetric frequencies the via-hole inductance becomes significant. Because of these problems with conventional microstrip circuits, there is now a lot of interest in using coplanar waveguide instead, particularly in Japan. Coplanar waveguide does not use a grounded backface, and its dimensions do not depend much on the substrate thickness; thus via-holes are eliminated and a chip thickness of 600 μm is acceptable. The wafer diameter can be increased significantly, yielding many more chips per wafer and reducing their cost. The major disadvantage of CPW is that the ground planes must go wherever the signal conductor goes; in a simple amplifier this is not a problem, but in a complex multi-function chip the interconnection problems are impossible to solve neatly. There is a potential solution to all these problems. In addition to using coplanar techniques, one can add additional metal layers and dielectric layers to the basic GaAs CPW. This gives the circuit designer the ability to use a new family of basic transmission-line types