Title :
A Pseudo-Deterministic Functional ATPG based on EFSM Traversing
Author :
Di Guglielmo, Giuseppe ; Fummi, F. ; Marconcini, C. ; Pravadelli, G.
Author_Institution :
Dipt. di Informatica, Univ. di Verona
Abstract :
This paper presents a functional ATPG framework which exploits the extended finite state machine (EFSM) model to pseudo-deterministically generate test sequences. A constraint solver or a SAT-solver is used to generate test vectors that allow us to uniformly traverse the state space of the design under test (DUT). This definitely increases the ability of the ATPG to observe and control hard-to-detect faults
Keywords :
automatic test pattern generation; design for testability; fault diagnosis; finite state machines; EFSM; constraint solver; design under test; extended finite state machine; functional ATPG; hard to detect faults; pseudo deterministic; test sequences; Automata; Automatic test pattern generation; Circuit faults; Engines; Hardware design languages; Integrated circuit interconnections; Navigation; State-space methods; Test pattern generators; Testing;
Conference_Titel :
Microprocessor Test and Verification, 2005. MTV '05. Sixth International Workshop on
Conference_Location :
Austin, TX
Print_ISBN :
0-7695-2627-6
