DocumentCode
2807750
Title
New generation solution for micro via metallization and through hole plating
Author
Nikolova, Maria ; Watkowski, Jim ; Desalvo, Donald ; Blake, Ron
Author_Institution
MacDermid Inc., Waterbury
fYear
2007
fDate
1-3 Oct. 2007
Firstpage
119
Lastpage
122
Abstract
Smaller holes and increasing circuit density are drivers that push technology for via in pad and stacked microvia designs that help minimize PWB real estate. It has been established that via in pad designs, where the via is not filled, can lead to voids in the BGA solder joint which can negatively affect reliability. Stacked vias, or sequential build-up process is a known technology where vias (either blind or through hole) are metallized, plated to required thickness then circuitized. Another layer of dielectric is applied and the process repeated. This paper discusses a vertical, direct current (DC) acid copper electroplating system that achieves filling and excellent physical properties of the deposited copper. The copper electrolyte is based on sulfuric acid. This process exhibits stable, long-term performance and possesses a wide operating window that incorporates a new approach to accelerate the bottom up filling mechanism. A wide range of working current densities can be utilized, thus permitting for a flexible plating time dependent on board design. The throwing power of the plating solution as well as the mechanical properties of the electroplated copper are studied. The filling capabilities described enable a highly reliable stacked via construction.
Keywords
copper; electroplating; manufacturing processes; metallisation; printed circuit manufacture; Cu; acid copper electroplating; bottom up filling mechanism; filling capabilities; flexible plating time; mechanical properties; micro via metallization; plating solution; sequential build-up process; stacked microvia designs; stacked via construction; through hole plating; throwing power; vertical direct current electroplating; via in pad; Acceleration; Copper; Current density; Dielectrics; Driver circuits; Filling; Lead; Mechanical factors; Metallization; Soldering;
fLanguage
English
Publisher
ieee
Conference_Titel
Microsystems, Packaging, Assembly and Circuits Technology, 2007. IMPACT 2007. International
Conference_Location
Taipei
Print_ISBN
978-1-4244-1637-0
Electronic_ISBN
978-1-4244-1637-0
Type
conf
DOI
10.1109/IMPACT.2007.4433581
Filename
4433581
Link To Document