• DocumentCode
    2807808
  • Title

    A novel pair-based (2×2) technique for fast inductance extraction of narrow on-chip interconnects

  • Author

    Chakravarthy, Srinath ; Mazumder, Mohiuddin ; Dai, Chaghong

  • Author_Institution
    TCAD, Intel Corp., Hillsboro, OR, USA
  • fYear
    2004
  • fDate
    25-27 Oct. 2004
  • Firstpage
    315
  • Lastpage
    318
  • Abstract
    Inductance noise coupling to a net primarily depends on the mutual inductances between the net and its attackers. The mutual inductances between the attackers themselves are assumed to have less impact, and are consequently ignored in some noise estimation methodologies for post-layout extraction flows. Such simplified methodologies do not require the fully coupled inductance matrix; and it rather needs only the self-inductance of the attackers and a mutual inductance between the victim and its attackers. A new technique has been implemented to achieve an average speed up of 10× with an accuracy loss of less than +/- 5% with respect to the full (N×N) extraction.
  • Keywords
    inductance; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; coupled inductance matrix; inductance extraction; inductance noise coupling; mutual inductances; noise estimation; on-chip interconnects; post layout extraction flows; self inductance; Conductors; Inductance; Mutual coupling; Skin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic Packaging, 2004. IEEE 13th Topical Meeting on
  • Print_ISBN
    0-7803-8667-1
  • Type

    conf

  • DOI
    10.1109/EPEP.2004.1407620
  • Filename
    1407620