DocumentCode :
280815
Title :
Problems in testing mixed analogue and digital ICs-a user´s view
Author :
Miller, P.J.
fYear :
1990
fDate :
33192
Firstpage :
42370
Lastpage :
42372
Abstract :
Summarises the experience of a company wishing to use a mixed analogue/digital IC within a product. The authors performed the (cell level) design in-house, using a foundry to produce, test and package the result. The design in question was realisable by several vendors containing some 2000 gates (highly sequential), a few low specification operational amplifiers, analogue switches and some EEPROM (about 32 bits). Three manufacturers were shortlisted and technical discussions started. They all concluded the design was feasible and two decided it was economic for them to produce `the chip´ in the lowish (about 10000 per year) quantities specified. Problems in testing the circuit were then addressed
fLanguage :
English
Publisher :
iet
Conference_Titel :
Design and Test of Mixed Analogue and Digital Circuits, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
191246
Link To Document :
بازگشت