• DocumentCode
    2808608
  • Title

    Molded underfill technology for low-k flip chip packages

  • Author

    Tseng, Wen-Tsung ; Tsai, Ho-Yi ; Chiu, Steve ; Hsiao, C.S.

  • Author_Institution
    Siliconware Precision Ind. Co. Ltd., Taichung
  • fYear
    2007
  • fDate
    1-3 Oct. 2007
  • Firstpage
    335
  • Lastpage
    337
  • Abstract
    Low-k dielectrics materials in the active layers on the chip surface has become a hot topic as most 90 nm devices and all 65 nm devices utilize low-k dielectrics materials. Low-k dielectrics materials provide a significant increase in performance of the devices but low-k materials have very low mechanical strength compared to the traditional dielectric films due to their porous nature, which results in low strength and poor adhesion qualities of the low-k dielectric materials. These lead to a unique set of mechanical issues when low-k die are packaged, the reliability of low-k flip chip packaging has become a critical issue. The coefficient of thermal expansion (CTE) mismatch between the silicon die and the substrate produces a bending or curvature of the assembly upon changes of temperature. This type of thermal/mechanical stress can lead to solder bump fatigue, delamination of the low-k dielectrics materials and the failure of the electronic package. Due to the mechanical sensitivity of the low-k material, stresses induced by the package has been demonstrated to exasperate the problem. Additionally, the tight bump pitch and low standoff height of future packages reduce the flow performance of conventional liquid capillary underfill (CUF) that results in low productivity (low unit per hour (UPH)) and low throughput. Thence, there is a need to use better technology to improve these problems, new molding underfill flip chip ball grid arrays (terminator FCBGA ) structure is developed. It uses hydrodynamic pressure of a mold press to transfer molten molding underfill material into the flip chip undergap, Therefore it does not have the same limitation as the conventional liquid capillary underfill (CUF) and the biggest advantage is its better coplanarity, high throughput , low stress , stronger bump protection, better solder joint capability and same thermal performance, especially for large package size and large die size. New molding underfill structure terminator FCB- - GA can provide strong bump protection and reach high reliability performance due to epoxy molding compound (EMC) low coefficient of thermal expansion (CTE) and high modulus. This kind of structure can also be applied all kind of bump composition such as tin-lead, high lead, and lead free. Furthermore, this paper also describes the process and reliability validation result.
  • Keywords
    ball grid arrays; delamination; dielectric materials; flip-chip devices; low-k dielectric thin films; moulding; thermal expansion; active layers; chip surface; delamination; dielectric films; electronic package failure; epoxy molding compound; flip chip ball grid arrays; flip chip undergap; hydrodynamic pressure; liquid capillary underfill; low-k dielectrics materials; low-k flip chip packages; low-k flip chip packaging; mechanical sensitivity; mechanical strength; mechanical stress; mold press; molded underfill technology; molten molding underfill material; porous nature; silicon die; solder bump fatigue; thermal expansion coefficient mismatch; thermal stress; Dielectric materials; Electronic packaging thermal management; Electronics packaging; Environmentally friendly manufacturing techniques; Flip chip; Lead; Protection; Thermal expansion; Thermal stresses; Throughput; Low-k; coplanarity; flip chip; molding underfill;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microsystems, Packaging, Assembly and Circuits Technology, 2007. IMPACT 2007. International
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-1636-3
  • Electronic_ISBN
    978-1-4244-1637-0
  • Type

    conf

  • DOI
    10.1109/IMPACT.2007.4433630
  • Filename
    4433630