Common mode signal pairs improvement design in high speed application

For the high speed substrate design, the impacts of common mode are more and more remarkable, but many designers only consider how to improve a differential mode electrical performance. In the high speed applications, some specifications have defined the standard for common mode performance. In the FCBGA substrates, the capacitance value is quite big near a bumping pad, it causes common mode noise and leads to a signal loss, distortion or error. In this paper, we present a common mode signal pair improvement design for high speed interconnections.