• DocumentCode
    2808966
  • Title

    Parallel Microprocessor Architecture as Building Block Module for Implementation of Static Connected MIMDs: Architectural Design of Building Block Module

  • Author

    Kahveci, T.M. ; Martin, Harold L.

  • Author_Institution
    North Carolina A&T State University
  • fYear
    1992
  • fDate
    1-3 Mar 1992
  • Firstpage
    324
  • Lastpage
    328
  • Keywords
    Chip scale packaging; Clocks; Computer aided instruction; Computer architecture; Microprocessors; Pipelines; Reduced instruction set computing; Registers; Topology; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System Theory, 1992. Proceedings. SSST/CSA 92. The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design
  • ISSN
    0094-2898
  • Print_ISBN
    0-8186-2665-8
  • Type

    conf

  • DOI
    10.1109/SSST.1992.712293
  • Filename
    712293
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2808966