The mM-Hypercube

Unlike today´s semiconductor devices whose input/output signals are associated with surges of electrons, the signals in nanodevices are associated with states or counts of electrons. This is one of the revolutionary technologies in the design of nanolCs. Traditional logic design methodologies may not satisfy the requirements and properties of nanoscale computing devices, such as the stochastic nature of signals and processes, localized molecular connections, and increasing demand on fault-tolerance computation [1]. Much attention has been devoted to the search of the logic design models for the representation of combinational nanolCs and sequential nanolCs, i.e., the N-hypercube and the M-hypercube, respectively [1, 2]. This paper proposes the mM-hypercube which not only provides a hypercube representation of finite state machines in m-valued nanodimensions but also satisfies the requirements for highly parallel computation and multi-valued structure of nanodevices. The transmission nodes of an mM-hypercube can implement nanodevices with states operated by multiple electrons which produce multiple transactions from one state node to many state nodes. Thus, the mM hypercube model is a more general logic design model for future advanced nanolCs.