Method and model of B-Ga-Al diffusion processes for fabrication of silicon on insulator wafer with buried P-type layer

In order to explore the fabrication method of the BPL SOI wafer, we tried to combine thermal diffusion of B-Ga-Al into Si process with SiO₂-SiO₂ bonding and etch back process. Therefore, in this paper, the diffusion law of B-Ga-Al into Si was mainly studied and its complementary error function-Gauss united distribution model of Ga concentration and numerical integration mode based on Gauss distribution of differential elements of Al concentration were established. Then the results of the above models simulated with numerical integration method were compared with the results simulated with Silvaco TCAD - a world famous software for simulation of semiconductor technologies and devices, which indicates that both fit well each other. Therefore the models established characterize the diffusion law of B-Ga-Al in Si very well and are very applied to guideline the design, simulation and fabrication of lateral super-high voltage RF/power semiconductor devices with BPL SOI wafer both in theory and in practical.