• DocumentCode
    2811772
  • Title

    Functional test content optimization for peak-power validation — An experimental study

  • Author

    Kamath, Vinayak ; Chen, Weijie ; Sumikawa, N. ; Wang, L.-C.

  • Author_Institution
    Univ. of California, Santa Barbara, Santa Barbara, CA, USA
  • fYear
    2012
  • fDate
    5-8 Nov. 2012
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    One of the challenges of functional test content optimization, in the context of performance validation, is to predict from a high level model an event of interest observed in either a detailed simulation or in silicon testing. This work uses peak power validation as an example to study the potential of using learning algorithms to uncover the correlations between the different levels of abstraction. Using the OpenSPARC T2 microprocessor as the driving example, we have studied the use of three learning algorithms for building models to explain the events of interest in the output of a power simulation. These models are built based on features extracted from a high-level view of the design. We show that the learned models can be used to select assembly programs that are likely to produce similar interesting events, and also can be used to produce constrained random assembly programs capable of exposing the events of our interest.
  • Keywords
    elemental semiconductors; integrated circuit design; integrated circuit testing; microprocessor chips; silicon; OpenSPARC T2 microprocessor; Si; functional test content optimization; high level model; peak-power validation; power simulation; Abstracts; Optimization; Pipelines; Probability; Registers; Silicon; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference (ITC), 2012 IEEE International
  • Conference_Location
    Anaheim, CA
  • ISSN
    1089-3539
  • Print_ISBN
    978-1-4673-1594-4
  • Type

    conf

  • DOI
    10.1109/TEST.2012.6401586
  • Filename
    6401586