Title :
A proposal of LDMOS using Deep Trench poly field plate
Author :
Joowon Park ; Kwangsik Ko ; Jina Eum ; Kuemju Lee ; Jungsu Jin ; Yeounsoo Kim ; Seonghoe Jeong ; Sanghyun Lee ; Jaehee Lee ; Inwook Cho
Author_Institution :
Technol. Dev. Team, SK Hynix Inc., Cheongju, South Korea
Abstract :
In this paper, we developed Deep Trench structure of LDMOS instead of STI in conventional one, with 0.18um 60V BCD process. By forming vertical drift region using Deep Trench, we achieved lower Ron.sp from cell pitch shrink while BVdss does not change. As a result we achieved 76V BVdss and 49.3 mohm*mm2 Ron.sp of low side 60V rated LDNMOS.
Keywords :
BIMOS integrated circuits; BCD process; BVdss; LDMOS; LDNMOS; STI; cell pitch shrink; deep trench poly field plate; deep trench structure; size 0.18 mum; voltage 60 V; voltage 76 V; Electric fields; Implants; Junctions; Layout; Logic gates; Plugs; Resistance; DTFP; LDMOS; vertical drift region;
Conference_Titel :
Power Semiconductor Devices & IC's (ISPSD), 2015 IEEE 27th International Symposium on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4799-6259-4
DOI :
10.1109/ISPSD.2015.7123411
