Title :
High speed, versatile analogue arrays
Author_Institution :
STC Microsyst. Design Centre, Sidcup
Abstract :
There has been a significant increase in the range of analogue circuits which can be implemented. Even so, the fixed location of all the components makes layout design difficult, and can result in significant waste die area and in speed limitations. Accordingly, over the past two years the author has been developing designs which further increase the range of function which can be implemented using arrays
Keywords :
analogue circuits; cellular arrays; circuit layout; function; layout design; speed limitations; waste die area;
Conference_Titel :
ASIC Design on Silicon, IEE Colloquium on
Conference_Location :
London
