DocumentCode :
2815714
Title :
A low-power, high-speed 10-bit GaAs DAC
Author :
Naber, J.F. ; Singh, H.P. ; Sadler, R.A. ; Latusis, J.E. ; Tanis, W.J.
Author_Institution :
ITT Gallium Arsenide Technol. Center, Roanoke, VA, USA
fYear :
1990
fDate :
7-10 Oct. 1990
Firstpage :
33
Lastpage :
36
Abstract :
A 10-bit digital-to-analog converter (DAC) has been designed and fabricated in gallium arsenide using a 0.7- mu m MESFET self-aligned gate process. This circuit has the highest reported resolution for a GaAs DAC with monolithic current sources. The DAC operates at a 1-GHz sampling rate while dissipating only 139 mW of power. This design is not ideal for a system-level insertion because of the required bias adjustments of the FET current source, even though the R-2R ladder required no adjustment. However, the incorporation of the R-2R ladders in a segmented approach is expected to eliminate the bias adjustment requirement.<>
Keywords :
III-V semiconductors; Schottky gate field effect transistors; digital-analogue conversion; field effect integrated circuits; gallium arsenide; integrated circuit technology; 0.7 micron; 1 GHz; 10 bit; 139 mW; DAC; GaAs; MESFET; R-2R ladder; digital-to-analog converter; high-speed; low-power; monolithic current sources; sampling rate; segmented approach; self-aligned gate process; Circuits; Digital-analog conversion; FETs; Frequency synthesizers; Gallium arsenide; Operational amplifiers; Resistors; Signal resolution; Voltage-controlled oscillators; Wideband;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1990. Technical Digest 1990., 12th Annual
Conference_Location :
New Orleans, LA, USA
Type :
conf
DOI :
10.1109/GAAS.1990.175441
Filename :
175441
Link To Document :
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