Advanced design for wideband MMIC power amplifiers

Five chips are described, illustrating the state of design techniques and more advanced design concepts for broadband and distributed power amplifiers. All circuits incorporate FETs in cascode configurations with tapered drain and gate lines with an instantaneous bandwidth of 2 to 18 GHz. New techniques are demonstrated, including the combination of cascode structure and double-gate line, the cascading of two stages with an intermediate low-impedance level (25 ohms), and an on-chip distributed biasing circuit. Calculations, with both time-domain and harmonic-balance simulators, demonstrate agreement with measured performances: nominal output power levels between 500 mW and 1 W throughout the frequency range, associated gains to 9 dB for a single stage, and power added efficiencies of better than 10%.<>