A low power 16 K GaAs HMESFET static RAM with built-in redundancy

The 4 K*4 GaAs HMESFET SRAM uses high value cermet resistors for memory cell load elements and incorporates an on-chip power switch. It is the first of a series of high-density E/D (enhancement/depletion) static RAM designs to be developed for high-speed applications. Latches for the address inputs and RAM outputs can be selectively clocked for pipelined operation or made transparent for asynchronous operation via mode control pins. Pipelined operation can be obtained with all registers clocked or with clocked input registers only. The new SRAM was developed assuming that fabrication yield, power consumption, and the operating temperature range of GaAs SRAMS need to be improved to make them useful in systems at the 16 K level of complexity. The RAM design implements laser redundancy circuits to improve yield and combines cermet memory cell resistors with an on-chip power switch to achieve 1 W power dissipation in operation and 8- mW in the standby mode.<>