DocumentCode
2816356
Title
GaAs high-speed data transfer network for a parallel processing system
Author
Kitaura, Yuya ; Kameyama, A. ; Terada, Tsubasa ; Uchitomi, N. ; Sudo, Toshio ; Maeda, Atsushi
Author_Institution
Toshiba ULSI Res. Center, Kawasaki, Japan
fYear
1990
fDate
7-10 Oct. 1990
Firstpage
195
Lastpage
198
Abstract
A GaAs high-speed data transfer network connecting multiple processor units (PUs) has been successfully developed in a module with 8-b slice GaAs bus logic (BL) LSIs, which fully functioned at more than 100 MHz. The GaAs multichip module consists of 12 GaAs BL LSIs in a 3*4 matrix. In the parallel processing system, a 4 Gbit/s data transfer data (32 b*120 MHz) can be realized by four stacked modules of 48 GaAs BLs.<>
Keywords
III-V semiconductors; large scale integration; logic arrays; multiprocessor interconnection networks; parallel processing; 4 Gbit/s; LSIs; bus logic; high-speed data transfer network; multiple processor units; parallel processing system; stacked modules; CMOS logic circuits; Clocks; Gallium arsenide; Joining processes; Large scale integration; Parallel processing; Pipeline processing; Radio frequency; Ultra large scale integration; Vector processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1990. Technical Digest 1990., 12th Annual
Conference_Location
New Orleans, LA, USA
Type
conf
DOI
10.1109/GAAS.1990.175485
Filename
175485
Link To Document