Title :
Environmental value (EnV) analysis
Author :
Thurwachter, S. ; Schoening, J. ; Sheng, P.
Author_Institution :
Dept. of Mech. Eng., California Univ., Berkeley, CA, USA
Abstract :
In the life cycle of a semiconductor, from material extraction to electronics disposal, the processing of the wafers creates a significant environmental impact, and this impact is a major concern for semiconductor manufacturers. However, many of the impacts can be most effectively addressed by the equipment suppliers who design the manufacturing processes. The environmental value (EnV) analysis model is presented as a design tool which evaluates environmental cost of ownership, impact, and process quality to obtain effective total solutions for minimizing the impacts of semiconductor manufacturing. A case study evaluating 2 chamber cleaning processes for plasma enhanced chemical vapor deposition (PECVD) demonstrates implementation of the model
Keywords :
environmental factors; plasma CVD; semiconductor device manufacture; chamber cleaning processes; electronics disposal; environmental cost of ownership; environmental impact; environmental value analysis; manufacturing processes design; material extraction; plasma enhanced chemical vapor deposition; process quality; semiconductor life cycle; semiconductor manufacturing; wafers processing; Cleaning; Costs; Electronic equipment manufacture; Manufacturing processes; Plasma chemistry; Process design; Semiconductor device manufacture; Semiconductor device modeling; Semiconductor materials; Virtual manufacturing;
Conference_Titel :
Electronics and the Environment, 1999. ISEE -1999. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Danvers, MA
Print_ISBN :
0-7803-5495-8
DOI :
10.1109/ISEE.1999.765851