High performance FPGA based elliptic curve cryptographic co-processor

Author

Lutz, Jonathan ; Hasan, Anwarul

Author_Institution

Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada

Volume

2

fYear

2004

fDate

5-7 April 2004

Firstpage

486

Abstract

A high performance elliptic curve coprocessor is developed, which is optimized for a binary field recommended by NIST. The architecture uses a field multiplier capable of performing a field multiplication over the extension field with degree 163 in 0.060 μsec. The coprocessor uses Lopez and Dahab´s projective coordinate system and is optimized specifically for Koblitz curves. An efficient implementation of Itoh and Tsujii´s method for inversion with performance comparable to the extended Euclidean algorithm is used. A prototype of the processor has been implemented for the binary extension field with degree 163 on a Xilinx XCV2000E FPGA. The prototype runs at 66 MHz and performs an elliptic curve scalar multiplication in 0.233 msec on a generic curve and 0.075 msec on a Koblitz curve.

Keywords

Galois fields; computer architecture; coprocessors; cryptography; field programmable gate arrays; message authentication; multiplying circuits; Dahab projective coordinate system; Euclidean algorithm; Galois fields; Itoh method; Koblitz curves; Lopez projective coordinate system; Tsujii method; Xilinx XCV2000E FPGA; binary extension field; elliptic curve cryptographic coprocessor; elliptic curve scalar multiplication; field multiplier; generic curve; high performance FPGA; optimization; processor prototype implementation; Coprocessors; Elliptic curve cryptography; Elliptic curves; Equations; Field programmable gate arrays; Galois fields; Hardware; NIST; Polynomials; Prototypes;

fLanguage

English

Publisher

ieee

Conference_Titel

Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004. International Conference on

Print_ISBN

0-7695-2108-8

Type

conf

DOI

10.1109/ITCC.2004.1286701

Filename

1286701