GaAs MMIC yield modeling

The models for chip yield are an important tool in achieving and maintaining affordable GaAs monolithic microwave ICs (MMICs). This includes usage throughout the design and production cycle to (1) maximize designed-in yields (yield optimization), (2), determine yield limiting process steps (process refinement), (3) monitor fabrication yields (learning curve), and (4) accurately project actual projection costs of new designs. The basis is developed for an analysis yield model useful in these areas. Experimental yield data from on-wafer DC/RF testing are used together with analytical techniques developed for silicon VLSI to determine the statistical properties of MMIC yield. These properties are used to define an appropriate formulation for the model, which relates observed yields of MMICs to their associated component content. Applications of the model to the above areas are discussed.<>