Title :
Statistics of Grain Boundaries in gate poly-Si
Author :
Watanabe, Hiroshi
Author_Institution :
Advanced LSI Technology Laboratory, Toshiba Corp., Isogo, Yokohama 235-8522, Japan. Phone: +81-45-770-3691 FAX: +81-45-770-3578 E-mail: pierre.watanabe@toshiba.co.jp
Abstract :
A nanometer-scale variation due to grain boundaries in gate poly-Si is investigated in detail assuming arrangement of grain boundaries obeys the Poisson distribution. Statistics of grain boundaries described here enables us to understand nanoscopic fluctuation in leakage current and threshold voltage shift in MOSFETs. For the first time, these nanoscopic fluctuation and arrangement variation of grain boundaries are related.
Keywords :
Fluctuations; Frequency; Grain boundaries; Laboratories; Large scale integration; Leakage current; MOSFET circuits; Statistical distributions; Statistics; Threshold voltage;
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 2005. SISPAD 2005. International Conference on
Print_ISBN :
4-9902762-0-5
DOI :
10.1109/SISPAD.2005.201467
