• DocumentCode
    2817740
  • Title

    ESD Protection Design Optimization Using a Mixed-Mode Simulation and Its Impact on ESD Protection Design of Power Bus Line Resistance

  • Author

    Hayashi, Hirokazu ; Kuroda, Toshikazu ; Kato, Katsuhiro ; Fukuda, Koichi ; Baba, Shunsuke ; Fukuda, Yasuhiro

  • Author_Institution
    Oki Electric Industry Co. Ltd., 550-1 Higashiasakawa-cho, Hachiouji-shi, Tokyo, 193-8550 Japan. TEL: +81-426-62-6109, FAX: +81-426-67-8367, E-mail: hayashil23@oki.com
  • fYear
    2005
  • fDate
    01-03 Sept. 2005
  • Firstpage
    99
  • Lastpage
    102
  • Abstract
    This paper presents a new optimization method of ESD protection design using a mixed-mode ESD simulation with a calibrated model based on DC and TLP characteristics. As a result, the influence of power bus line resistance on ESD protection design is clarified using the calibrated model for each device used in ESD protection circuit. ESD surge flows into an internal circuit easily as the value of the power bus line resistance increases even if the ESD tolerance of a power clamp element is high enough.
  • Keywords
    Circuit simulation; Circuit testing; Clamps; Design optimization; Electrical resistance measurement; Electrostatic discharge; Impurities; Protection; Thyristors; Transmission line measurements;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation of Semiconductor Processes and Devices, 2005. SISPAD 2005. International Conference on
  • Print_ISBN
    4-9902762-0-5
  • Type

    conf

  • DOI
    10.1109/SISPAD.2005.201482
  • Filename
    1562034