Modeling of energy capability of power devices with copper layer integration

High power devices can generate large amount of heat dissipation that limits severely their power handling capability. In this paper, we propose intensive investigations of the electro-thermal characteristics of lateral nDMOS transistors processed in a 0.7 μm CMOS based smart power technology. In particular, it is demonstrated, both experimentally and theoretically, that the thermal management improves substantially when a layer of an electroplated copper is deposited on top of the power device. The latter serves as a heat sink to help dissipate the heat generated during operating conditions. More importantly, we have derived a simple but yet potential theoretical model which predictions are in complete agreement with experimental and simulation results.