DocumentCode :
2818200
Title :
Modeling of MOS transistors and circuits at high temperature
Author :
Lai, J.C. ; Liu, S.T. ; Beaudoin, K.P.
Author_Institution :
Solid State Electron. Center, Honeywell Inc., Plymouth, MN, USA
Volume :
1
fYear :
1994
fDate :
3-5 Aug 1994
Firstpage :
650
Abstract :
Silicon-on-Insulator (SOI) is useful for analog/digital CMOS circuits at high temperature due to reduction of leakage currents. This is mainly due to the reduction of the junction areas of the SOI CMOS transistors. Temperature dependence of SOI CMOS transistors (-55 to 275°C) is modeled and compared to experiments. The model is used to predict the results of a high temperature 64K CMOS static RAM
Keywords :
CMOS memory circuits; SPICE; SRAM chips; high-temperature effects; integrated circuit modelling; silicon-on-insulator; -55 to 275 C; 64 Kbit; SOI CMOS circuits; SOI CMOS transistors; high temperature modeling; junction areas; leakage currents; silicon-on-insulator; static RAM; Circuits; MOS devices; MOSFETs; Ring oscillators; SPICE; Semiconductor device modeling; Semiconductor process modeling; Subthreshold current; Temperature; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on
Conference_Location :
Lafayette, LA
Print_ISBN :
0-7803-2428-5
Type :
conf
DOI :
10.1109/MWSCAS.1994.519378
Filename :
519378
Link To Document :
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