Title :
An On-Chip In-Circuit Emulation Architecture for Debugging an Asynchronous Java Accelerator
Author :
Zhao, Meng ; Liu, Zhijing ; Liang, Zheng ; Zhou, Duan
Author_Institution :
Comput. Sch., Xidian Univ., Xi´´an, China
Abstract :
The solution to debug a problem in a deeply embedded system is to integrate the debug and communication module inside the chip. In this paper, we propose an on-chip in-circuit emulation (ICE) architecture for debugging an asynchronous Java accelerator core which can be integrated with any existing processor and operating system. The operation of this ICE module and the debug strategy of the Java accelerator are specifically designed for asynchronous implementation. They not only facilitate the system development but also provide a manufacture test method for asynchronous chips.
Keywords :
Java; computer debugging; embedded systems; microprocessor chips; system-on-chip; asynchronous Java accelerator core; asynchronous chips; communication module; debugging; embedded system; on-chip in-circuit emulation architecture; operating system; processor; Acceleration; Debugging; Embedded system; Emulation; Ice; Java; Manufacturing; Operating systems; System testing; System-on-a-chip;
Conference_Titel :
Computational Intelligence and Software Engineering, 2009. CiSE 2009. International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-4507-3
Electronic_ISBN :
978-1-4244-4507-3
DOI :
10.1109/CISE.2009.5363421
