• DocumentCode
    2818385
  • Title

    A Novel Single-Gated Strained CMOS Architecture: COSMOS

  • Author

    Al-Ahmadi, Ahmad ; Kaya, Savas

  • Author_Institution
    School of EE&CS, Ohio University, Athens, OH 45701, USA
  • fYear
    2005
  • fDate
    01-03 Sept. 2005
  • Firstpage
    263
  • Lastpage
    266
  • Abstract
    We present a simulation study of a novel CMOS device architecture capable of building complementary logic operation using only a single gate stack. The new architecture, named complementary orthogonal stacked MOS (COSMOS), places the n and p-MOSFETs perpendicular to one another under a single gate. As a result of concurrent vertical and lateral integration, the COSMOS architecture can lead to dramatic savings in active device area of a conventional static CMOS pair, as weil as significant reductions in RC device parasitics. We demonstrate how the COSMOS devices may be built, operated and optmized for symmetric operation, also verifing logic NOT operation via 3D device simulations. COSMOS architecture appears to have peculiar scaling trends such as increasing threshold at reduced gate dimensions. The increase in drive voltages lead to faster operation at the expense of higher static leakage and loss of noise margins.
  • Keywords
    Buildings; CMOS logic circuits; CMOS process; Design engineering; Electronic mail; Geometry; Logic devices; MOSFET circuits; Voltage; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation of Semiconductor Processes and Devices, 2005. SISPAD 2005. International Conference on
  • Print_ISBN
    4-9902762-0-5
  • Type

    conf

  • DOI
    10.1109/SISPAD.2005.201523
  • Filename
    1562075