DocumentCode :
2819736
Title :
Digitally-assisted analog designs for submicron CMOS technology
Author :
Lai, Fang-Shi ; Lin, Yung-Fu ; Weng, Adams ; Hsueh, Kevin ; Hsueh, Fu-Lung
Author_Institution :
Design Technol. Div., TSMC, Hsinchu, Taiwan
fYear :
2010
fDate :
26-29 April 2010
Firstpage :
49
Lastpage :
52
Abstract :
Three different digitally-assisted analog designs are presented to demonstrate the powerful way to solve the analog design deficiencies in the submicron CMOS technology. A 200 MS/s 12-bit pipeline ADC is using the split-capacitor correlation method to solve the linear and nonlinear problems. A 1 GS/s 14-bit current-steering DAC is using the programmable sub-DAC to continuously trimming the current mismatches. A 25 MS/s 16-bit ΣΔ ADC is using the adaptive way to correct the leakage noise and DAC nonlinearity.
Keywords :
CMOS integrated circuits; digital-analogue conversion; sigma-delta modulation; current-steering DAC; digitally-assisted analog designs; leakage noise; pipeline ADC; sigma-delta ADC; split-capacitor correlation; storage capacity 12 bit; storage capacity 14 bit; storage capacity 16 bit; submicron CMOS technology; CMOS process; CMOS technology; Calibration; Circuit noise; Error correction; Noise reduction; Pipelines; Power supplies; Signal to noise ratio; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design Automation and Test (VLSI-DAT), 2010 International Symposium on
Conference_Location :
Hsin Chu
Print_ISBN :
978-1-4244-5269-9
Electronic_ISBN :
978-1-4244-5271-2
Type :
conf
DOI :
10.1109/VDAT.2010.5496689
Filename :
5496689
Link To Document :
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