Gate array implementation of the composite radix transform algorithm

Describes the development of two application specific integrated circuit devices which, together, form the basis of a high performance, modular Fourier transform processor. The processing algorithms employed within these devices were devised by T. Curtis (see ibid., no.1989/90, p.2/1-9, 1989) of the Admiralty Research Establishment, Portland. From the initial formulation of the prime radix transform (PRAT) algorithm and the exploitation of emerging gate array technology, the final system design was developed through a series of refinements to both the algorithms and the hardware implementation. As part of this process, the original algorithms were extended to allow for the inclusion of non-prime number transforms; giving rise to the formulation of the composite radix fourier transform (CRAFT) algorithm. An outline is given of the algorithms used, and their method of partitioning and implementation within the two devices