Title :
Idempotent AN codes
Author_Institution :
R. Signals & Radar Establ., Malvern, UK
Abstract :
An approach to fault-tolerant computing in general and digital signal processing in particular is that of arithmetic error-detecting/correcting codes. These codes were designed to commute with the addition operator and the theory is extensive. In digital signal processing applications the bulk of the arithmetic is addition and multiplication, it is therefore interesting to look for codes that commute with both addition and multiplication. It is shown that such a code does in fact exist; an AN code where the code generator A is an idempotent i.e. A2=A. This code, unfortunately, has a serious deficiency in that errors can be masked by a fault-free multiplier. Thus no single (non-separate) code is suitable for both addition and multiplication. Motivated by this problem and the fact that AN codes were designed around the addition operator, the characteristics of a code that commutes with multiplication are discussed. A simple code that satisfies these requirements is presented: an AN+B code. The results of some computer simulations of an AN+B coded multiplier are given
Keywords :
computerised signal processing; digital simulation; error correction codes; error detection codes; fault tolerant computing; multiplying circuits; AN+B code; AN+B coded multiplier; addition; arithmetic; code generator; commute; computer simulations; digital signal processing; error correction codes; error detection codes; fault-tolerant computing; idempotent AN codes; multiplication;
Conference_Titel :
Signal Processing Applications of Finite Field Mathematics, IEE Colloquium on
Conference_Location :
London