• DocumentCode
    2820388
  • Title

    Run-time Reconfiguration of expandable cache for embedded systems

  • Author

    Hsieh, Ang-Chih ; Hwang, TingTing

  • Author_Institution
    Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • fYear
    2010
  • fDate
    26-29 April 2010
  • Firstpage
    207
  • Lastpage
    210
  • Abstract
    Expandable cache is very efficient in reducing miss rate and energy consumption with small area overhead. However, using only MSB for cache expansion may lead to thrashing problems. Based on the structure of expandable cache, a new cache design which considers program behavior and has more flexible expansion schemes is introduced. The expansion scheme of our proposed cache design is dynamically changed by executing configuration instructions. The experimental results of SPEC CPU2000 show that our proposed cache design effectively improves the miss rate and energy consumption by 37.7% and 13.6%, respectively, as compared with direct-mapped cache. As compared with expandable cache, the improvements of our method are about 6.6% and 2.6% higher in terms of miss rate and energy consumption.
  • Keywords
    cache storage; embedded systems; reconfigurable architectures; SPEC CPU2000; cache expansion; direct-mapped cache; embedded systems; energy consumption; flexible expansion; miss rate; run-time reconfiguration; thrashing problems; Batteries; Computer science; Costs; Degradation; Embedded system; Energy consumption; Hardware; Pollution; Runtime; Software design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design Automation and Test (VLSI-DAT), 2010 International Symposium on
  • Conference_Location
    Hsin Chu
  • Print_ISBN
    978-1-4244-5269-9
  • Electronic_ISBN
    978-1-4244-5271-2
  • Type

    conf

  • DOI
    10.1109/VDAT.2010.5496726
  • Filename
    5496726