Substrate resistance effect on the Fmax parameter of isolated BJT in BiCMOS process

Author

Gloria, D. ; Perrotin, A. ; Carbonéro, J.L. ; Morin, G.

Author_Institution

Central R&D, ST Microelectron., Crolles, France

fYear

1999

fDate

1999

Firstpage

24

Lastpage

29

Abstract

High frequency test structures for bipolar devices with several guard ring configurations are described. Using these structures, the substrate effect on merit figures such as Ft and Fmax has been studied experimentally and compared to Microwave Design System (MDS) electrical simulations. A worst case for guard ring position is proposed, providing up to 15 GHz Fmax degradation

Keywords

BiCMOS integrated circuits; MMIC; bipolar transistors; circuit simulation; integrated circuit reliability; integrated circuit testing; BiCMOS process; Fmax parameter; Ft parameter; Microwave Design System electrical simulations; bipolar devices; guard ring configurations; guard ring position; high frequency test structures; isolated BJT; merit figures; substrate effect; substrate resistance effect; BiCMOS integrated circuits; Capacitance; Degradation; Frequency; Microelectronics; Microwave devices; Research and development; Scattering parameters; Silicon; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 1999. ICMTS 1999. Proceedings of the 1999 International Conference on

Conference_Location

Goteborg

Print_ISBN

0-7803-5270-X

Type

conf

DOI

10.1109/ICMTS.1999.766210

Filename

766210