DocumentCode :
2821393
Title :
A configurable cascaded continuous-time ΔΣ modulator with up to 15MHz bandwidth
Author :
Sauerbrey, Jens ; Garcia, Jacinto San Pablo ; Panov, Georgi ; Piorek, Thomas ; Shen, Xianghua ; Schimper, Markus ; Koch, Rudolf ; Keller, Matthias ; Manoli, Yiannos ; Ortmanns, Maurits
Author_Institution :
Infineon Technol. AG, Neubiberg, Germany
fYear :
2010
fDate :
14-16 Sept. 2010
Firstpage :
426
Lastpage :
429
Abstract :
A reconfigurable cascaded continuous-time 3-1 ΔΣ modulator with low PVT sensitivity was developed and implemented in 65nm digital CMOS. The 0.17mm2 chip achieves 67/55dB SNR and 70/61dB DR at 10/15MHz bandwidth with only 208MHz clock frequency and 10.5mW power consumption from a 1.3V supply.
Keywords :
delta-sigma modulation; power consumption; bandwidth 10 MHz; bandwidth 15 MHz; clock frequency; digital CMOS; frequency 208 MHz; low PVT sensitivity; power 10.5 mW; power consumption; reconfigurable cascaded continuous-time delta-sigma modulator; size 65 nm; voltage 1.3 V; Bandwidth; Modulation; Signal to noise ratio; Temperature measurement; Transfer functions; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ESSCIRC, 2010 Proceedings of the
Conference_Location :
Seville
ISSN :
1930-8833
Print_ISBN :
978-1-4244-6662-7
Type :
conf
DOI :
10.1109/ESSCIRC.2010.5619734
Filename :
5619734
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2821393
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