DocumentCode
2821576
Title
Comparison of a programmable DSP and FPGA implementation for a wavelet-based denoising algorithm
Author
Montani, Matteo ; De Marchi, Luca ; Marcianesi, Andrea ; Speciale, Nicolo
Author_Institution
DEIS, Univ. of Bologna
Volume
2
fYear
2003
fDate
30-30 Dec. 2003
Firstpage
602
Abstract
In this work the authors presented a field programmable gate array (FPGA) and a digital signal processor (DSP) implementations of an algorithm for real-time signal detection and denoising based on undecimated (stationary) wavelet packet transform (SWPT). The performance was compared in terms of operating clock frequencies, power consumption and signal-to-noise-ratio (SNR) due to finite word-length effects using a fixed-point arithmetics in the FPGA and floating-point in DSP. Finally the possibility of reconfiguration and extension is considered
Keywords
digital signal processing chips; discrete wavelet transforms; field programmable gate arrays; signal denoising; FPGA implementation; digital signal processor; field programmable gate array; programmable DSP; signal detection; wavelet based denoising algorithm; wavelet packet transform; Clocks; Digital signal processing; Digital signal processors; Field programmable gate arrays; Frequency; Noise reduction; Signal detection; Signal processing algorithms; Wavelet packets; Wavelet transforms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
Conference_Location
Cairo
ISSN
1548-3746
Print_ISBN
0-7803-8294-3
Type
conf
DOI
10.1109/MWSCAS.2003.1562358
Filename
1562358
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