Geometry modeling method for narrow/short and narrow MOSFETs

Author

Sekine, Satoshi ; Sugiyama, Motoyasu ; Saito, Naomi

Author_Institution

Comput. Technol. Lab., Motorola Japan Ltd., Miyagi, Japan

fYear

1999

fDate

1999

Firstpage

125

Lastpage

130

Abstract

In this paper, we present a new physics-based model for narrow width MOSFETs that accounts for the LOCOS narrow width effect and the webbing effect. The model is based on physical geometry changes of MOSFETs that are caused by the changes in field edge shape during LOCOS isolation and consecutive oxide etch, and the webbing effect of lithography for the dog-bone layout. It allows the use of a single set of parameters for any combination of MOSFET widths and lengths without geometry binning. We also discuss details of the test structures and the modeling procedure, and model implementation in SPICE simulation

Keywords

MOSFET; SPICE; dielectric thin films; etching; isolation technology; lithography; oxidation; semiconductor device models; semiconductor device testing; LOCOS isolation; LOCOS narrow width effect; MOSFET length; MOSFET physical geometry changes; MOSFET width; SPICE model implementation; SPICE simulation; SiO₂-Si; dog-bone layout; field edge shape; geometry binning; geometry modeling method; lithography; modeling procedure; narrow channel MOSFETs; narrow width MOSFETs; narrow/short MOSFETs; oxide etch; physics-based model; test structures; webbing effect; Etching; Geometry; Laboratories; Lithography; MOSFETs; Oxidation; Physics computing; SPICE; Shape; Solid modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 1999. ICMTS 1999. Proceedings of the 1999 International Conference on

Conference_Location

Goteborg

Print_ISBN

0-7803-5270-X

Type

conf

DOI

10.1109/ICMTS.1999.766229

Filename

766229