Title :
Delayed partial parity scheme for reliable and high-performance flash memory SSD
Author :
Im, Soojun ; Shin, Dongkun
Author_Institution :
Sch. of ICE, Sungkyunkwan Univ., Suwon, South Korea
Abstract :
The I/O performances of flash memory solid-state disks (SSDs) are increasing by exploiting parallel I/O architectures. However, the reliability problem is a critical issue in building a large-scale flash storage. We propose a novel Redundant Arrays of Inexpensive Disks (RAID) architecture which uses the delayed parity update and partial parity caching techniques for reliable and high-performance flash memory SSDs. The proposed techniques improve the performance of the RAID-5 SSD by 38% and 30% on average in comparison to the original RAID-5 technique and the previous delayed parity update technique, respectively.
Keywords :
RAID; flash memories; parallel architectures; reliability; RAID-5 technique; delayed parity update technique; delayed partial parity scheme; high-performance flash memory solid-state disks; large-scale flash storage; parallel I/O architectures; partial parity caching techniques; redundant arrays of inexpensive disks architecture; reliability problem; Buildings; Costs; Delay; Error correction codes; Flash memory; Hard disks; Ice; Large-scale systems; Redundancy; Solid state circuits;
Conference_Titel :
Mass Storage Systems and Technologies (MSST), 2010 IEEE 26th Symposium on
Conference_Location :
Incline Village, NV
Print_ISBN :
978-1-4244-7152-2
Electronic_ISBN :
978-1-4244-7153-9
DOI :
10.1109/MSST.2010.5496997